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Designing high-speed adders in power-constrained environments
ArticleAbstract: Data-driven dynamic logic (D3L) is very efficient when low-power constraints are mandatory. UnfortunPalabras claves:Clock-precharged dynamic logic, Data-driven dynamic logic (D3L), Data-precharged dynamic logic, Parallel prefix adderAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusLow-power level shifter for multi-supply voltage designs
ArticleAbstract: In this brief, a new low-power level shifter (LS) is presented for robust logic voltage shifting froPalabras claves:Level shifter (LS), multi-supply voltage design, sub-threshold operation, Ultra-low powerAutores:Corsonello P., Marco Lanuzza, Perri S.Fuentes:scopus