Mostrando 2 resultados de: 2
Filtros aplicados
Publisher
2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings(1)
VLSI Design(1)
Área de conocimiento
Ingeniería electrónica(2)
Origen
scopus(2)
Dynamic gate-level body biasing for subthreshold digital design
Conference ObjectAbstract: Dynamic gate-level body biasing has been recently proposed as an alternative design methodology forPalabras claves:Autores:Albano D., Marco Lanuzza, Ramiro TacoFuentes:scopusUltra-low-voltage self-body biasing scheme and its application to basic arithmetic circuits
ArticleAbstract: The gate level body biasing (GLBB) is assessed in the context of ultra-low-voltage logic designs. ToPalabras claves:Autores:Albano D., Marco Lanuzza, Ramiro TacoFuentes:scopus