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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)(4)
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International Journal of Circuit Theory and Applications(2)
2009 IEEE International Workshop on Medical Measurements and Applications, MeMeA 2009(1)
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scopus(24)
Comparative analysis of yield optimized pulsed flip-flops
ArticleAbstract: In this paper, the influence of random process variations on pulsed flip-flops is analyzed. Monte CaPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Rose R.D.Fuentes:scopusAM<sup>4</sup>: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing
ArticleAbstract: In-memory computing seeks to minimize data movement and alleviate the memory wall by computing in-siPalabras claves:associative memories, associative processor, CAM, Double-barrier MTJ, emerging memories, MRAM, MTJ, Non-von Neumann computer architecture, TCAMAutores:Esteban Garzón, Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusA Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation
ArticleAbstract: In this paper, we propose an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-MagnPalabras claves:Double-barrier MTJ, energy-efficiency, Low-power, non-volatile TCAM (NV-TCAM)Autores:Carpentieri M., Esteban Garzón, Finocchio G., Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusA New optimized high-speed low-power Data-Driven Dynamic (D3L) 32-bit Kogge-Stone adder
Conference ObjectAbstract: Data Driven Dynamic Logic (D3L) achieves a considerably energy saving, over conventional Domino LogiPalabras claves:D3L, Data pre-charged dynamic logic, Parallel prefix adderAutores:Frustaci F., Marco LanuzzaFuentes:scopusA RISC-V-based Research Platform for Rapid Design Cycle
Conference ObjectAbstract: This work proposes a novel platform for bringing a project from the concept to the tapeout stage inPalabras claves:Autores:Esteban Garzón, Golman R., Harel O., Kra Y., Marco Lanuzza, Noy T., Pollock A., Rudin Y., Shoshan Y., Teman A., Weitzman Y., Yuzhaninov S.Fuentes:scopusA novel ICA-based hardware system for reconfigurable and portable BCI
Conference ObjectAbstract: Partially or completely paralyzed patients can benefit from Brain Computer Interface (BCI) in whichPalabras claves:Autores:Calabrese B., Cocorullo G., Gambardella A., Marco Lanuzza, Palumbo A., Sturniolo M., Veltri P., Vizza P.Fuentes:scopusAIDA: Associative In-Memory Deep Learning Accelerator
ArticleAbstract: This work presents an associative in-memory deep learning processor (AIDA) for edge devices. An assoPalabras claves:Autores:Esteban Garzón, Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusDesign and evaluation of an energy-delay-area efficient datapath for coarse-grain reconfigurable computing systems
ArticleAbstract: This paper presents the architecture and complete VLSI implementation of a high data throughput, enePalabras claves:arithmetic circuits, Data path design, Reconfigurable architecturesAutores:Corsonello P., Marco Lanuzza, Margate M., Perri S., Purohit S.Fuentes:scopusDesign of high-speed low-power parallel-prefix adder trees in nanometer technologies
ArticleAbstract: This paper presents a novel approach to design high-speed low-power parallel-prefix adder trees. SubPalabras claves:Brent-Kung adder tree, High-speed addition, Parallel-Prefix addersAutores:Corsonello P., Marco Lanuzza, Perri S.Fuentes:scopusDesign-space exploration of energy-delay-area efficient coarse-grain reconfigurable datapath
Conference ObjectAbstract: This paper presents the VLSI design of a high data throughput, energy and area efficient data path tPalabras claves:Autores:Corsonello P., Marco Lanuzza, Margala M., Perri S., Purohit S.Fuentes:scopus