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Solid State Electronics(2)
2024 IEEE Latin American Electron Devices Conference Laedc 2024(1)
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scopus(4)
Assessment of a universal logic gate and a full adder circuit based on CMOS-memristor technology
ArticleAbstract: The study of memristor-based digital logic circuits is a new approach in non-conventional computatioPalabras claves:Full Adder, Logic circuits, Logic gates, RERAM, ULG, variabilityAutores:J. Yépez, Martin Gavilanez, Ramiro Taco, Silvana Guitarra, U. EspinozaFuentes:scopusAnalysis of high resistive conduction mechanism in HfO2-based ReRAM devices
OtherAbstract: This paper investigates the conduction mechanism in HfO2-based ReRAM devices during the High ResistaPalabras claves:conduction mechanism, Filament, HRS, QPC, RERAM, variabilityAutores:Laurent Raymond, Silvana Guitarra, Trojman L.Fuentes:scopusA probabilistic compact model of ReRAM memories for accurate and high-performance simulation
ArticleAbstract: This work presents a compact, circuit-level model for resistive random-access memories (ReRAMs) thatPalabras claves:Device history, ReRAM model, resistive switching, stochastic process, Switching probability, variabilityAutores:A. Vélez, J. Cevallos, Martin Gavilanez, Silvana GuitarraFuentes:scopusA Calibrated Memristor Model Implementation for an SR-Latch Based on CMOS-Memristor Technology
OtherAbstract: An SR-Latch based on CMOS-memristor technol-ogy has been implemented in LT-spice, employing memristoPalabras claves:Latch, OR gate, RERAM, SR-Latch, variabilityAutores:Martin Gavilanez, Silvana GuitarraFuentes:scopus