Mostrando 4 resultados de: 4
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Publisher
2022 IEEE 13th Latin American Symposium on Circuits and Systems, LASCAS 2022(1)
ETCM 2021 - 5th Ecuador Technical Chapters Meeting(1)
Electronics (Switzerland)(1)
IEEE Solid-State Circuits Letters(1)
Origen
scopus(4)
Assessment of 10 nm Tunnel-FETs and FinFETs transistors for ultra-low voltage and high-speed digital circuits
Conference ObjectAbstract: The trade-offs of the Tunnel-FETs (TFETs) in terms of delay, energy per cycle, and noise margin arePalabras claves:digital circuits, Energy-delay trade-off, FinFET, Tunnel-FET (TFET), Ultra-low voltageAutores:Christian Cao, Kevin Landázuri, Luis Miguel Prócel Moya, Mateo Rendón, Ramiro Taco, Trojman L.Fuentes:scopusA 0.8-V, 1.54-pJ/940-MHz Dual-Mode Logic-Based 16×16-b Booth Multiplier in 16-nm FinFET
ArticleAbstract: The dual-mode logic (DML) defines runtime adapted digital architectures that switch to either improvPalabras claves:Adaptive design, digital signal processing (DSP), Dual-mode logic (DML)Autores:Fish A., Marco Lanuzza, Ramiro Taco, Shavit N., Stanger I.Fuentes:scopusPerformance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective
ArticleAbstract: Miniaturization and portable devices have reshaped the electronic device landscape, emphasizing thePalabras claves:characterization, FinFET, MSP-430, Standard cell library, Synthesis, Tunnel-FET (TFET), Ultra-low voltageAutores:Christian Cao, Esteban Garzón, Kevin Landázuri, Luis Miguel Prócel Moya, Mateo Rendón, Ramiro TacoFuentes:scopusVoltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories
Conference ObjectAbstract: This work presents energy advantages allowed by the technology and voltage scaling of spin-transferPalabras claves:double-barrier magnetic tunnel junction (DMTJ), Embedded memory, energy-efficient, FinFET, Low-voltage, STT-MRAMAutores:Esteban Garzón, Luis Miguel Prócel Moya, Marco Lanuzza, Ramiro Taco, Trojman L.Fuentes:scopus