Assessment of 10 nm Tunnel-FETs and FinFETs transistors for ultra-low voltage and high-speed digital circuits

Conference Object

Abstract: The trade-offs of the Tunnel-FETs (TFETs) in terms of delay, energy per cycle, and noise margin are

Palabras claves:

digital circuits, Energy-delay trade-off, FinFET, Tunnel-FET (TFET), Ultra-low voltage

Autores:

Christian Cao, Kevin Landázuri, Luis Miguel Procel Moya, Mateo Rendón, Ramiro Taco, Trojman L.

Fuentes:

scopus