Documentos de Francisco Ortega-Zamorano | REDI

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Mostrando 10 resultados de: 25

Subtipo de publicación

Conference Object(13)

Publisher

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)(5)

Neural Processing Letters(3)

2018 IEEE 3rd Ecuador Technical Chapters Meeting, ETCM 2018(2)

Advances in Intelligent Systems and Computing(2)

2016 IEEE Latin American Conference on Computational Intelligence, LA-CCI 2016 - Proceedings(1)

Área temáticas

Ciencias de la computación(15)

Métodos informáticos especiales(12)

Física aplicada(8)

Programación informática, programas, datos, seguridad(8)

Funcionamiento de bibliotecas y archivos(2)

Área de conocimiento

Ciencias de la computación(15)

Red neuronal artificial(10)

Aprendizaje automático(7)

Inteligencia artificial(4)

Año de Publicación

Origen

Palabras Claves

Constructive Neural Networks(6)

Hardware implementation(6)

Supervised learning(6)

Committee c-mantec: A probabilistic constructive neural network

Conference Object

Abstract: C-Mantec is a recently introduced constructive algorithm that generates compact neural architectures

Palabras claves:

Committee networks, Constructive Neural Networks, Supervised classification

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., José Luis Subirats, Luque-Baena R.M., Urda D.

Deep neural network architecture implementation on FPGAs using a layer multiplexing scheme

Conference Object

Abstract: In recent years pbkp_redictive models based on Deep Learning strategies have achieved enormous succe

Palabras claves:

Deep Neural Networks, Fpga, Hardware implementation, Layer multiplexing, Supervised learning

Francisco Ortega-Zamorano, Franco L., Gómez I., Jerez-Aragonés J.M.

Exploratory Data Analysis and Foreground Detection with the Growing Hierarchical Neural Forest

Abstract: In this paper, a new self-organizing artificial neural network called growing hierarchical neural fo

Palabras claves:

Clustering, image segmentation, Self-Organization, TEXT MINING

Benítez-Rochel R., Esteban José Palomo, Francisco Ortega-Zamorano, López-Rubio E.

FPGA Hardware Acceleration of Monte Carlo Simulations for the Ising Model

Abstract: A two-dimensional Ising model with nearest-neighbors ferromagnetic interactions is implemented in a

Palabras claves:

Hardware implementation, Ising model, LFSR random number generator, Monte Carlo simulations

Cannas S.A., Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Montemurro M.A.

FPGA Implementation of Neurocomputational Models: Comparison Between Standard Back-Propagation and C-Mantec Constructive Algorithm

Abstract: Recent advances in FPGA technology have permitted the implementation of neurocomputational models, m

Palabras claves:

Constructive Neural Networks, Fpga, Hardware implementation

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E.

FPGA implementation comparison between C-mantec and back-propagation neural network algorithms

Conference Object

Abstract: Recent advances in FPGA technology have permitted the implementation of neurocomputational models, m

Palabras claves:

Constructive Neural Networks, Fpga, Hardware implementation

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E.

FPGA implementation of the c-mantec neural network constructive algorithm

Abstract: Competitive majority network trained by error correction (C-Mantec), a recently proposed constructiv

Palabras claves:

Circuit complexity, constructive neural networks (CoNN), on-chip learning, Threshold networks

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M.

Efficient Implementation of the Backpropagation Algorithm in FPGAs and Microcontrollers

Abstract: The well-known backpropagation learning algorithm is implemented in a field-programmable gate array

Palabras claves:

Embedded Systems, field-programmable gate array (FPGA), Hardware implementation, Microcontrollers, Supervised learning

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Luque-Baena R.M., Urda D.

Digital cryptography implementation using neurocomputational model with autoencoder architecture

Conference Object

Abstract: An Autoencoder is an artificial neural network used for unsupervised learning and for dimensionality

Palabras claves:

Artificial Neural Network, ASCII Characters, Autoencoder, Cryptography

Francisco Ortega-Zamorano, Francisco Quinga Socasi, Luis Zhinin-Vera, Oscar Chang, Rafael Valencia-Ramos, Ronny Xavier Velasteguí

High precision FPGA implementation of neural network activation functions

Conference Object

Abstract: The efficient implementation of artificial neural networks in FPGA boards requires tackling several

Palabras claves:

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E., Perez J.O.