Mostrando 8 resultados de: 8
Filtros aplicados
Publisher
2018 IEEE 3rd Ecuador Technical Chapters Meeting, ETCM 2018(1)
Expert Systems with Applications(1)
IEEE SSCI 2014 - 2014 IEEE Symposium Series on Computational Intelligence - IES 2014: 2014 IEEE Symposium on Intelligent Embedded Systems, Proceedings(1)
IEEE Transactions on Industrial Informatics(1)
IEEE Transactions on Parallel and Distributed Systems(1)
Área temáticas
Ciencias de la computación(6)
Métodos informáticos especiales(3)
Ciencias políticas (Política y gobierno)(1)
Humanidad(1)
Inglés e inglés antiguo (anglosajón)(1)
Área de conocimiento
Ciencias de la computación(5)
Aprendizaje automático(4)
Red neuronal artificial(3)
Simulación por computadora(3)
Algoritmo(1)
Origen
scopus(8)
FPGA Hardware Acceleration of Monte Carlo Simulations for the Ising Model
ArticleAbstract: A two-dimensional Ising model with nearest-neighbors ferromagnetic interactions is implemented in aPalabras claves:Hardware implementation, Ising model, LFSR random number generator, Monte Carlo simulationsAutores:Cannas S.A., Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Montemurro M.A.Fuentes:scopusFPGA Implementation of Neurocomputational Models: Comparison Between Standard Back-Propagation and C-Mantec Constructive Algorithm
ArticleAbstract: Recent advances in FPGA technology have permitted the implementation of neurocomputational models, mPalabras claves:Constructive Neural Networks, Fpga, Hardware implementationAutores:Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E.Fuentes:scopusFPGA implementation comparison between C-mantec and back-propagation neural network algorithms
Conference ObjectAbstract: Recent advances in FPGA technology have permitted the implementation of neurocomputational models, mPalabras claves:Constructive Neural Networks, Fpga, Hardware implementationAutores:Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E.Fuentes:scopusFPGA implementation of the c-mantec neural network constructive algorithm
ArticleAbstract: Competitive majority network trained by error correction (C-Mantec), a recently proposed constructivPalabras claves:Circuit complexity, constructive neural networks (CoNN), on-chip learning, Threshold networksAutores:Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M.Fuentes:scopusHigh precision FPGA implementation of neural network activation functions
Conference ObjectAbstract: The efficient implementation of artificial neural networks in FPGA boards requires tackling severalPalabras claves:Autores:Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E., Perez J.O.Fuentes:scopusLayer multiplexing FPGA implementation for deep back-propagation learning
ArticleAbstract: Training of large scale neural networks, like those used nowadays in Deep Learning schemes, requiresPalabras claves:Deep Neural Networks, Fpga, Hardware implementation, Layer multiplexing, Supervised learningAutores:Francisco Ortega-Zamorano, Franco L., Gómez I., Jerez-Aragonés J.M.Fuentes:scopusSmart motion detection sensor based on video processing using self-organizing maps
ArticleAbstract: Most current approaches to computer vision are based on expensive, high performance hardware to meetPalabras claves:Arduino, Block processing, IMAGE PROCESSING, microcontroller, self-organizing mapAutores:Esteban José Palomo, Francisco Ortega-Zamorano, López-Rubio E., Molina-Cabello M.A.Fuentes:scopusSuccessive Adaptive Linear Neural Modeling for Equidistant Real Roots Finding
Conference ObjectAbstract: The main objective of this work has been to implement a model to find equidistant real roots using aPalabras claves:Polynomial roots, SOM, Supervised learningAutores:Fernando P. Zhapa, Francisco Ortega-Zamorano, Joseph R. Gonzalez, Oscar V. GuarnizoFuentes:scopus