Documentos de Francisco Ortega-Zamorano | REDI

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Mostrando 6 resultados de: 6

Filtros aplicados

Palabras Claves: "Hardware implementation"

Subtipo de publicación

Conference Object(2)

Publisher

Advances in Intelligent Systems and Computing(1)

IEEE Transactions on Neural Networks and Learning Systems(1)

IEEE Transactions on Parallel and Distributed Systems(1)

Integrated Computer-Aided Engineering(1)

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)(1)

Área temáticas

Ciencias de la computación(5)

Física aplicada(4)

Métodos informáticos especiales(3)

Libros poéticos del Antiguo Testamento(1)

Área de conocimiento

Aprendizaje automático(3)

Ciencias de la computación(3)

Simulación por computadora(2)

Arquitectura de computadoras(1)

Año de Publicación

Origen

Palabras Claves

Supervised learning(3)

Constructive Neural Networks(2)

Deep Neural Networks(2)

Layer multiplexing(2)

Deep neural network architecture implementation on FPGAs using a layer multiplexing scheme

Conference Object

Abstract: In recent years pbkp_redictive models based on Deep Learning strategies have achieved enormous succe

Palabras claves:

Deep Neural Networks, Fpga, Hardware implementation, Layer multiplexing, Supervised learning

Francisco Ortega-Zamorano, Franco L., Gómez I., Jerez-Aragonés J.M.

FPGA Hardware Acceleration of Monte Carlo Simulations for the Ising Model

Abstract: A two-dimensional Ising model with nearest-neighbors ferromagnetic interactions is implemented in a

Palabras claves:

Hardware implementation, Ising model, LFSR random number generator, Monte Carlo simulations

Cannas S.A., Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Montemurro M.A.

FPGA Implementation of Neurocomputational Models: Comparison Between Standard Back-Propagation and C-Mantec Constructive Algorithm

Abstract: Recent advances in FPGA technology have permitted the implementation of neurocomputational models, m

Palabras claves:

Constructive Neural Networks, Fpga, Hardware implementation

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E.

FPGA implementation comparison between C-mantec and back-propagation neural network algorithms

Conference Object

Abstract: Recent advances in FPGA technology have permitted the implementation of neurocomputational models, m

Palabras claves:

Constructive Neural Networks, Fpga, Hardware implementation

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Juárez G.E.

Efficient Implementation of the Backpropagation Algorithm in FPGAs and Microcontrollers

Abstract: The well-known backpropagation learning algorithm is implemented in a field-programmable gate array

Palabras claves:

Embedded Systems, field-programmable gate array (FPGA), Hardware implementation, Microcontrollers, Supervised learning

Francisco Ortega-Zamorano, Franco L., Jerez-Aragonés J.M., Luque-Baena R.M., Urda D.

Layer multiplexing FPGA implementation for deep back-propagation learning

Abstract: Training of large scale neural networks, like those used nowadays in Deep Learning schemes, requires

Palabras claves:

Deep Neural Networks, Fpga, Hardware implementation, Layer multiplexing, Supervised learning

Francisco Ortega-Zamorano, Franco L., Gómez I., Jerez-Aragonés J.M.