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Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits
ArticleAbstract: In this work, a benchmark for low-power digital applications of a III-V TFET technology platform agaPalabras claves:Full adders, III-V, Ripple carry adders, TFETAutores:Crupi F., Esseni D., Marco Lanuzza, Palestri P., Selmi L., Strangio S.Fuentes:scopusDigital and analog TFET circuits: Design and benchmark
ReviewAbstract: In this work, we investigate by means of simulations the performance of basic digital, analog, and mPalabras claves:Analog circuits, digital circuits, Simulation, TCAD, Tunnel-FETAutores:Crupi F., Esseni D., Marco Lanuzza, Palestri P., Selmi L., Settino F., Strangio S.Fuentes:scopus