Self-repairing SRAM architecture to mitigate the inter-die process variations at 65nm technology

Conference Object

Abstract: With aggressive scaling, one of the major barriers that CMOS technology faces is the increasing proc

Palabras claves:

Adaptive body biasing, Process variation mitigation technique, Random process variations, SRAM cell

Autores:

Corsonello P., Kansal S., Marco Lanuzza

Fuentes:

scopus