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From UML specifications to mapping and scheduling of tasks into a NoC, with reliability considerations
ArticleAbstract: This paper describes a technique for performing mapping and scheduling of tasks belonging to an execPalabras claves:Application mapping, Fault tolerance, Multiprocessor system-on-chip (MPSoC), Network-on-chip (NoC), Unified modeling language (UML)Autores:Aedo J.E., Bagherzadeh N., Bolanos F., Rivera Calle FredyFuentes:scopusMapping and scheduling in heterogeneous NoC through population-based incremental learning
ArticleAbstract: Network-on-Chip (NoC) is a growing and promising communication paradigm for Multiprocessor-System-OnPalabras claves:Computer-aided design (CAD), Multiprocessor-system-on-chip (MPSoC) and network-on-chip (NoC), Population-based incremental learning (PBIL)Autores:Aedo J.E., Bagherzadeh N., Bolanos F., Rivera Calle FredyFuentes:scopus