Design and evaluation of an energy-delay-area efficient datapath for coarse-grain reconfigurable computing systems

Article

Abstract: This paper presents the architecture and complete VLSI implementation of a high data throughput, ene

Palabras claves:

arithmetic circuits, Data path design, Reconfigurable architectures

Autores:

Corsonello P., Marco Lanuzza, Margate M., Perri S., Purohit S.

Fuentes:

scopus