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scopus(9)
AM<sup>4</sup>: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing
ArticleAbstract: In-memory computing seeks to minimize data movement and alleviate the memory wall by computing in-siPalabras claves:associative memories, associative processor, CAM, Double-barrier MTJ, emerging memories, MRAM, MTJ, Non-von Neumann computer architecture, TCAMAutores:Esteban Garzón, Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusA Low-Energy DMTJ-Based Ternary Content- Addressable Memory With Reliable Sub-Nanosecond Search Operation
ArticleAbstract: In this paper, we propose an energy-efficient, reliable, hybrid, 10-transistor/2-Double-Barrier-MagnPalabras claves:Double-barrier MTJ, energy-efficiency, Low-power, non-volatile TCAM (NV-TCAM)Autores:Carpentieri M., Esteban Garzón, Finocchio G., Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusAIDA: Associative In-Memory Deep Learning Accelerator
ArticleAbstract: This work presents an associative in-memory deep learning processor (AIDA) for edge devices. An assoPalabras claves:Autores:Esteban Garzón, Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusExploiting single-well design for energy-efficient ultra-wide voltage range Dual Mode Logic -based digital circuits in 28nm FD-SOI technology
Conference ObjectAbstract: In this paper we evaluate the implementation options of energy-efficient dual mode logic (DML) circuPalabras claves:Adaptive energy-efficient digital design, Dual mode logic, FD-SOIAutores:Fish A., Marco Lanuzza, Ramiro Taco, Shavit N., Stanger I., Yavits L.Fuentes:scopusFlexDML: High Utilization Configurable Multimode Arithmetic Units Featuring Dual Mode Logic
ArticleAbstract: Dual mode logic (DML) enables flexible energy-delay (ED) optimization. By setting the design elementPalabras claves:Arithmetic, CMOS, configurable computing, DML, dual mode logic (DML), dynamic, mixed-mode, Pipeline, staticAutores:Fish A., Levi I., Marco Lanuzza, Ramiro Taco, Shavit N., Stanger I., Yavits L.Fuentes:scopusDual mode logic address decoder
Conference ObjectAbstract: Address decoders are integral components of random access memories. In higher-performance computing,Palabras claves:dual mode logic (DML), Memory address decoderAutores:Fish A., Ramiro Taco, Shavit N., Stanger I., Yavits L.Fuentes:scopusEDAM: Edit Distance tolerant Approximate Matching content addressable memory
Conference ObjectAbstract: We propose a novel edit distance-tolerant content addressable memory (EDAM) for energy-efcient approPalabras claves:Autores:Esteban Garzón, Hanhan R., Jahshan Z., Marco Lanuzza, Teman A., Yavits L.Fuentes:scopusHamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification
ArticleAbstract: This paper proposes a novel Hamming distance tolerant content-addressable memory (HD-CAM) for energyPalabras claves:Approximate search, content addressable memory, DNA classification, hamming distance (HD)Autores:Esteban Garzón, Golman R., Hanhan R., Jahshan Z., Marco Lanuzza, Teman A., Vinshtok-Melnik N., Yavits L.Fuentes:scopusRobust dual mode pass logic (DMPL) for energy efficiency and high performance
Conference ObjectAbstract: In the past, Pass Transistor Logic (PTL) was widely used due to benefits in terms of speed and powerPalabras claves:16 nm, dual mode logic (DML), Energy efficiency, Logic family, Low Power, Pass Transistor Logic (PTL)Autores:Fish A., Marco Lanuzza, Ramiro Taco, Shavit N., Stanger I., Yavits L.Fuentes:scopus