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Evaluating the SEE Sensitivity of a 45 nm SOI Multi-Core Processor Due to 14 MeV Neutrons
ArticleAbstract: The aim of this work is to evaluate the SEE sensitivity of a multi-core processor having implementedPalabras claves:Accelerated testing, AMP, Multi-core, SEE, SEFI, SEU, SMP, Soft error, SOIAutores:Baylac M., Clemente J.A., Francesca Villa, Mehaut J.F., Pablo F. Ramos, Rey S., Vanessa Vargas, Velazco R., Zergainoh N.E.Fuentes:scopusEvidence of the robustness of a cots soft-error free SRAM to Neutron Radiation
ArticleAbstract: Radiation tests with 15-MeV neutrons were performed in a COTS SRAM including a new memory cell desigPalabras claves:Cots, LPSRAM, MUSCA SEP3, neutron tests, radiation hardness, reliability, Soft error, SRAMAutores:Baylac M., Clemente J.A., Francesca Villa, Franco F.J., Hubert G., Mansour W., Palomar C., Rey S., Rosetto O., Velazco R.Fuentes:scopusRadiation Experiments on a 28 nm Single-Chip Many-Core Processor and SEU Error-Rate Pbkp_rediction
ArticleAbstract: This work evaluates the SEE static and dynamic sensitivity of a single-chip many-core processor haviPalabras claves:Accelerated testing, fault injection, Many-core, parallel processing, SEE, SEFI, SEU, Soft errorAutores:Baylac M., Dupont De Dinechin B., Francesca Villa, Jalier C., Mehaut J.F., Pablo F. Ramos, Ray V., Rey S., Stevens R., Vanessa Vargas, Velazco R., Zergainoh N.E.Fuentes:scopusSEU Characterization of Three Successive Generations of COTS SRAMs at Ultralow Bias Voltage to 14.2-MeV Neutrons
ArticleAbstract: This paper presents a single event upset (SEU) sensitivity characterization at ultralow bias voltagePalabras claves:Commercial off-the-shelf (COTS), low bias voltage, neutron tests, radiation hardness, reliability, Soft error, static random access memories (SRAM)Autores:Baylac M., Clemente J.A., Fraire J., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Rey S., Velazco R.Fuentes:scopusStatistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs
ArticleAbstract: Recently, the occurrence of multiple events in static tests has been investigated by checking the stPalabras claves:Multiple cell upsets, neutron tests, Single Event Upsets, SRAMsAutores:Agapito J.A., Baylac M., Clemente J.A., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Rey S., Velazco R.Fuentes:scopusStatistical Deviations from the Theoretical Only-SBU Model to Estimate MCU Rates in SRAMs
ArticleAbstract: This paper addresses a well-known problem that occurs when memories are exposed to radiation: the dePalabras claves:Multiple cell upsets (MCUs), single bit upsets (SBUs), single events, soft errors, static random access memories (SRAMs)Autores:Agapito J.A., Baylac M., Clemente J.A., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Rey S., Velazco R.Fuentes:scopus