Efficiency of Dual Mode Logic in Nanoscale Technology Nodes
Abstract:
Previous work on Dual Mode Logic (DML) have demonstrated improvements in frequency and energy compared to CMOS. In this paper, for the first time, we examine scaling of the DML circuits and present an evaluation of DML in 28nm bulk technology. The impact of intrinsic capacitance, logic depth and robustness are analyzed for a wide power supply range. For this purpose, two benchmarks were implemented and compared to CMOS. Results show up to 22% better performance in terms of speed and up to 24% in terms of energy when the circuit operates in the dynamic and static mode, respectively.
Año de publicación:
2019
Keywords:
- nanoscaled technology nodes
- alternative logic family
- CMOS
- dual mode logic (DML)
Fuente:
scopus
Tipo de documento:
Conference Object
Estado:
Acceso restringido
Áreas de conocimiento:
- Ciencias de la computación
- Simulación por computadora
Áreas temáticas:
- Ciencias de la computación