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Flag Based All Digital Timing Recovery

Abstract:

We implemented an all-digital timing recovery i.e. without a VCO, that works in case the receiver is faster or slower than the transmitter and with no need of decimation, unlike other implementations. This system takes advantage of and is suitable for parallel structures.

Año de publicación:

2019

Keywords:

  • timing recovery
  • PLL
  • digital CDR

Fuente:

googlegoogle
scopusscopus

Tipo de documento:

Conference Object

Estado:

Acceso restringido

Áreas de conocimiento:

    Áreas temáticas:

    • Física aplicada

    Contribuidores:

    Daniel CárdenasDaniel Cárdenas
    Germán Arévalo BermeoGermán Arévalo Bermeo