Regresar

Front and rear contact Si solar cells combining high and low thermal budget Si passivating contacts

Abstract:

In this work we develop a rear emitter silicon solar cell integrating carrier-selective passivating contacts (CSPCs) with different thermal budget in the same device. The solar cell consists of a B-doped poly-Si/SiO x hole collector and an i/n hydrogenated amorphous silicon (a-Si:H) stack acting as electron collector placed on the planar rear and textured front side, respectively. We investigate the passivation properties of both CSPCs on symmetric structures by optimizing the interdependency among annealing temperature, time and environment. The optimized B-doped poly-Si/SiO x reaches a saturation current density of ~10 fA/cm 2 on n-type wafers and an implied open circuit voltage (iV OC ) of 716 mV. Furthermore, the i/n a-Si:H stack shows an effective carrier lifetime above 4 ms and iV OC of ~705 mV for cell-relevant layers thickness. After a post-deposition annealing in H 2 , lifetime is above 10 ms and iV OC = 708 mV. Finally, we optimize the optoelectronic properties of indium-based transparent conductive oxide (Indium Tin Oxide ITO and hydrogenated indium oxide IO:H) to reduce parasitic absorption with a gain in short circuit current density of 0.23 mA/cm 2 . In conclusion, the optimized layer stacks are implemented at device level obtaining a device with V OC = 704 mV, fill factor of 73.8%, a short circuit current of 39.7 mA/cm 2 and 21.0% aperture-area conversion efficiency.