Software-hardware co-design for video coding acceleration


Abstract:

In this paper, an advanced video coding acceleration based on software-hardware co-design for low power embedded system is proposed. Today, people enjoy HD video formats all over the world, but to compress it into a portable format (such as H.264) costs too much time. In embedded systems, it is very costly to transform the entire software application into a hardware solution especially if it will consume a large amount of power. Thus, we studied the famous H.264 model in order to explore the hotspot function and balance the tradeoff between speed and energy consumption. The idea is to only transform the more readily used functions into hardware by designing a coprocessor and implementing it on Virtex 5 Field-Programmable Gate Array (FPGA) platform. The experimental results from this hardware implementation showed a 5 times increase in coding speed while minimizing the energy consumption to around 81 percent. © 2012 IEEE.

Año de publicación:

2012

Keywords:

  • Hardware Acceleration
  • Co-processor
  • H.264
  • Embedded System

Fuente:

scopusscopus

Tipo de documento:

Conference Object

Estado:

Acceso restringido

Áreas de conocimiento:

  • Ciencias de la computación

Áreas temáticas:

  • Ciencias de la computación