Regresar

Statistical study of SiON short MOSFET under Channel Hot Carrier stress

Abstract:

In this work we study the threshold voltage variation (ΔVth) under a Channel Hot Carrier stress using a statistical approach. Therefore we measure the transistor threshold voltage on 60 different dies with stress up to 1000s. The devices have either 70-nm or 40-nm gate length. Based on this approach we extract the average and the dispersion of the ΔVth and link this variation to the defect caused by the degradation. An analysis using a power law model of the defect generation demonstrates that the CHC stress we are using results of larger oxide trap for shorter devices. Further we discuss the dispersion variation with the stress. Finally a study of the performance based on a model of the mobility degradation suggests that the different type of defects affect in the same the performance degradation.