Verification and Validation Plan in a Software Product: A Practical Study
Abstract:
In Software Engineering practice, it is a challenge to develop quality software. In this way, several proposals have emerged, such as verification and validation process (V&V), which is composed of procedures, activities and tasks to verify and validate if the software is correct and if it satisfies user needs. For this reason, we based this study on Design Science Research (DSR) approach to answer the question: Does the implementation of a VVP verification and validation plan using the IEEE 1012-2016/Cor 1-2017 standard work? The method used to answer this question consisted of creating and applying a VVP to the ad-hoc SAREL software and then documenting the findings. The results show that the application of the VVP reached a compliance of 96.50%, according to the evaluation criteria of each V&V task granting a satisfactory degree of quality.
Año de publicación:
2022
Keywords:
- IEEE 1012-2016/Cor 1-2017
- Software verification and validation
- Software Engineering
Fuente:

Tipo de documento:
Conference Object
Estado:
Acceso restringido
Áreas de conocimiento:
- Ingeniería de software
- Software
- Software
Áreas temáticas:
- Programación informática, programas, datos, seguridad
- Epistemología (Teoría del conocimiento)
- Instrumentos de precisión y otros dispositivos