Mostrando 6 resultados de: 6
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Publisher
International Journal of Circuit Theory and Applications(2)
Circuits, Systems, and Signal Processing(1)
IEEE Transactions on Circuits and Systems II: Express Briefs(1)
IET Circuits, Devices and Systems(1)
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)(1)
Origen
scopus(6)
Analyzing noise robustness of wide fan-in dynamic logic gates under process variations
ArticleAbstract: Wide fan-in dynamic logic gates are difficult to design due to the large number of leaky evaluationPalabras claves:Dynamic logic, process variations, wide fan-inAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusA New optimized high-speed low-power Data-Driven Dynamic (D3L) 32-bit Kogge-Stone adder
Conference ObjectAbstract: Data Driven Dynamic Logic (D3L) achieves a considerably energy saving, over conventional Domino LogiPalabras claves:D3L, Data pre-charged dynamic logic, Parallel prefix adderAutores:Frustaci F., Marco LanuzzaFuentes:scopusDesigning dynamic carry skip adders: Analysis and comparison
ArticleAbstract: Addition represents an important operation that significantly impacts the performance of almost everPalabras claves:Carry skip adders, Dynamic circuitsAutores:Frustaci F., Marco Lanuzza, Purohit S., Rose R.D.Fuentes:scopusDesigning high-speed adders in power-constrained environments
ArticleAbstract: Data-driven dynamic logic (D3L) is very efficient when low-power constraints are mandatory. UnfortunPalabras claves:Clock-precharged dynamic logic, Data-driven dynamic logic (D3L), Data-precharged dynamic logic, Parallel prefix adderAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusEnergy-efficient single-clock-cycle binary comparator
ArticleAbstract: A new fast low-power single-clock-cycle binary comparator is presented. High speed is assured by usiPalabras claves:arithmetic circuits, binary comparator, CMOS, Low-powerAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusLow-power split-path data-driven dynamic logic
ArticleAbstract: Data-pre-charged dynamic logic, also known as data-driven dynamic logic (D3L), is very efficient whePalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopus