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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)(3)
International Journal of Circuit Theory and Applications(2)
2015 AEIT International Annual Conference, AEIT 2015(1)
ACM Transactions on Reconfigurable Technology and Systems(1)
Circuits, Systems, and Signal Processing(1)
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Embedded surveillance system using background subtraction and Raspberry Pi
Conference ObjectAbstract: One of the most challenging problems in computer vision is the ability of understanding video sequenPalabras claves:Background subtraction, Electronics, Embedded Systems, IMAGE PROCESSING, Raspberry PIAutores:Cocorullo G., Corsonello P., Frustaci F., Lorena Guachi-Guachi, Perri S.Fuentes:scopusEnergy-efficient single-clock-cycle binary comparator
ArticleAbstract: A new fast low-power single-clock-cycle binary comparator is presented. High speed is assured by usiPalabras claves:arithmetic circuits, binary comparator, CMOS, Low-powerAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusExploiting self-reconfiguration capability to improve SRAM-based FPGA robustness in space and avionics applications
ArticleAbstract: This article presents a novel configuration scrubbing core, used for internal detection and correctiPalabras claves:reconfigurable computing, Space and avionics applications, Xilinx FPGAsAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusA New optimized high-speed low-power Data-Driven Dynamic (D3L) 32-bit Kogge-Stone adder
Conference ObjectAbstract: Data Driven Dynamic Logic (D3L) achieves a considerably energy saving, over conventional Domino LogiPalabras claves:D3L, Data pre-charged dynamic logic, Parallel prefix adderAutores:Frustaci F., Marco LanuzzaFuentes:scopusA new low-power high-speed single-clock-cycle binary comparator
Conference ObjectAbstract: This paper presents a new ultra-low power high-speed single-clock-cycle binary comparator. It is basPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusA novel background subtraction method based on color invariants and grayscale levels
Conference ObjectAbstract: This paper presents a new method for background subtraction which takes advantages of using the coloPalabras claves:automatic monitoring, Background subtraction, Video systemsAutores:Cocorullo G., Corsonello P., Frustaci F., Lorena Guachi-Guachi, Perri S.Fuentes:scopusA self-hosting configuration management system to mitigate the impact of radiation-induced multi-bit upsets in SRAM-Based FPGAs
Conference ObjectAbstract: This paper presents an efficient circuit to mitigate the impact of Radiation-Induced Multi-Bit UpsetPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusComparative analysis of yield optimized pulsed flip-flops
ArticleAbstract: In this paper, the influence of random process variations on pulsed flip-flops is analyzed. Monte CaPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Rose R.D.Fuentes:scopusAn efficient and low-cost design methodology to improve SRAM-Based FPGA robustness in space and avionics applications
Conference ObjectAbstract: This paper presents an efficient approach to protect an FPGA design against Single Event Upsets (SEUPalabras claves:Avionics, Fpga, Reconfigurable System, Single Event Upsets, spaceAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusAnalyzing noise robustness of wide fan-in dynamic logic gates under process variations
ArticleAbstract: Wide fan-in dynamic logic gates are difficult to design due to the large number of leaky evaluationPalabras claves:Dynamic logic, process variations, wide fan-inAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopus