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Analyzing noise robustness of wide fan-in dynamic logic gates under process variations
ArticleAbstract: Wide fan-in dynamic logic gates are difficult to design due to the large number of leaky evaluationPalabras claves:Dynamic logic, process variations, wide fan-inAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusEnergy-efficient single-clock-cycle binary comparator
ArticleAbstract: A new fast low-power single-clock-cycle binary comparator is presented. High speed is assured by usiPalabras claves:arithmetic circuits, binary comparator, CMOS, Low-powerAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopus