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2022 IEEE 13th Latin American Symposium on Circuits and Systems, LASCAS 2022(1)
Electronics (Switzerland)(1)
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Microelectronic Engineering(1)
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings(1)
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Física aplicada(5)
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scopus(5)
Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework
ArticleAbstract: This paper deals with the technology scalability of spin-transfer torque magnetic RAMs (STT-MRAMs)baPalabras claves:Device-to-memory analysis, FinFET, Magnetic tunnel junction (MTJ), STT-MRAM, technology scalingAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusAssessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework
ArticleAbstract: This paper explores non-volatile cache memories implemented by spin-transfer torque magnetic randomPalabras claves:cache memory, Device-to-system simulation framework, double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAMAutores:Carpentieri M., Crupi F., Esteban Garzón, Finocchio G., Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusExploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs
Conference ObjectAbstract: This paper explores performance and technology-scalability of STT-MRAMs exploiting double-barrier MTPalabras claves:double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAM, technology-voltage scalingAutores:Carpentieri M., Crupi F., Esteban Garzón, Finocchio G., Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusPerformance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective
ArticleAbstract: Miniaturization and portable devices have reshaped the electronic device landscape, emphasizing thePalabras claves:characterization, FinFET, MSP-430, Standard cell library, Synthesis, Tunnel-FET (TFET), Ultra-low voltageAutores:Christian Cao, Esteban Garzón, Kevin Landázuri, Luis Miguel Prócel Moya, Mateo Rendón, Ramiro TacoFuentes:scopusVoltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories
Conference ObjectAbstract: This work presents energy advantages allowed by the technology and voltage scaling of spin-transferPalabras claves:double-barrier magnetic tunnel junction (DMTJ), Embedded memory, energy-efficient, FinFET, Low-voltage, STT-MRAMAutores:Esteban Garzón, Luis Miguel Prócel Moya, Marco Lanuzza, Ramiro Taco, Trojman L.Fuentes:scopus