Power and Area Reduction of MD5 based on Cryptoprocessor Using novel approach of Internal Counters on the Finite State Machine

Conference Object

Abstract: This work presents the design of a very simple microprocessor dedicated to cryptographic operations

Palabras claves:

Area Reduction, Integrated circuit, MD5, Power Optimization, Synopsis, System Verilog, Top-Down Design

Autores:

Juan José Jiménez, Luis Miguel Prócel Moya, Trojman L.

Fuentes:

scopus