Mostrando 5 resultados de: 5
Publisher
2022 IEEE 13th Latin American Symposium on Circuits and Systems, LASCAS 2022(1)
ETCM 2021 - 5th Ecuador Technical Chapters Meeting(1)
Electronics (Switzerland)(1)
IEEE Transactions on Circuits and Systems II: Express Briefs(1)
LAEDC 2021 - IEEE Latin America Electron Devices Conference(1)
A 180 nm Low-Cost Operational Amplifier for IoT Applications
Conference ObjectAbstract: This paper presents the design and post-layout simulation of a two-stage operational amplifier (opamPalabras claves:0.18 μ m, cadence virtuoso, High-performance, internet of things (IoT), Low-cost, miller compensation, operational amplifier, post-layout simulation, stabilityAutores:Ariana Musello, Cristhopher Mosquera, Kevin Vicuña, Luis Miguel Prócel Moya, Marco Lanuzza, Mateo Rendón, Ramiro Taco, Trojman L.Fuentes:scopusFabrication of Nanopores Using the Controlled Dielectric Breakdown Technique
Conference ObjectAbstract: Controlled dielectric breakdown is becoming the main solid-state nanopore fabrication technique worlPalabras claves:ACC, controlled dielectric breakdown, DAQ, DNA RNA sensor, fluidic cell, leakage current, Silicon nitride, solid-state nanopores, transmembraneAutores:Amaguayo N., Ariana Musello, José A. Bustamante, Luis Miguel Prócel Moya, Pablo Lopez, Trojman L.Fuentes:scopusEnergy efficient self-adaptive dual mode logic address decoder
ArticleAbstract: This paper presents a 1024-bit self-adaptive memory address decoder based on Dual Mode Logic (DML) dPalabras claves:Address decoder, Controller, Dual mode logic, Self-adaptiveAutores:Ariana Musello, Cristhopher Mosquera, Esteban Garzón, Kevin Vicuña, Luis Miguel Prócel Moya, Mateo Rendón, Ramiro Taco, Sara Benedictis, Trojman L.Fuentes:googlescopusEnergy-Efficient FinFET-Versus TFET-Based STT-MRAM Bitcells
Conference ObjectAbstract: This paper explores STT-MRAM bitcells based on double-barrier magnetic tunnel junctions (DMTJs) at tPalabras claves:double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAM, tunnel FET (TFET), Ultralow voltageAutores:Ariana Musello, Luis Miguel Prócel Moya, Marco Villegas, Ramiro Taco, Santiago S. Perez, Trojman L.Fuentes:googlescopusXNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs
ArticleAbstract: This brief presents an energy-efficient and high-performance XNOR-bitcount architecture exploiting tPalabras claves:bit-quad, BNN, cnn, Computing-in-memory, DMTJ, MAC, spin-transfer torque, STT-MRAM, XNOR-bitcountAutores:Ariana Musello, Esteban Garzón, Luis Miguel Prócel Moya, Marco Lanuzza, Ramiro TacoFuentes:scopus