Mostrando 3 resultados de: 3
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Conference Object(3)
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Advances in Intelligent Systems and Computing(2)
Proceedings - IEEE International Symposium on Circuits and Systems(1)
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Ciencias de la computación(3)
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Characterizing High-Speed Serial Transceivers for a Multi-processor Parallel Architecture
Conference ObjectAbstract: Emulation of large scale neural networks is a growing research field that tries to understand how thPalabras claves:Aurora 8b/10b, Fpga, GTX transceivers, Parallel hardware, ZYNQAutores:Bernardo Vallejo-Mancero, Liliana Topón-Visarrea, Mireya Zapata-RodríguezFuentes:googlescopusAcceleration of Evolutionary Grammar Using an MISD Architecture Based on FPGA and Petalinuxs
Conference ObjectAbstract: The evolutionary grammars are part of the optimization methods and searching for solutions based onPalabras claves:Evolutionary grammar, Hardware Acceleration, Linux embedded, PetalinuxAutores:Bernardo Vallejo-Mancero, Mireya Zapata-RodríguezFuentes:googlescopusHardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge
Conference ObjectAbstract: This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). APalabras claves:Edge computing, Hardware-Software Integration, HEENS, Neural Computing, SNAVA, SNN, Spiking Neural NetworksAutores:Bernardo Vallejo-Mancero, Madrenas J., Mata-Hernandez D., Mireya Zapata-Rodríguez, Oltra-Oltra J.A., Sato S.Fuentes:googlescopus