Mostrando 4 resultados de: 4
Filtros aplicados
Subtipo de publicación
Article(4)
Área temáticas
Física aplicada(4)
Programación informática, programas, datos, seguridad(2)
Ciencias de la computación(1)
Principios generales de matemáticas(1)
Área de conocimiento
Ciencias de la computación(2)
Arquitectura de computadoras(1)
Inferencia estadística(1)
Ingeniería electrónica(1)
Origen
scopus(4)
Sensitivity Characterization of a COTS 90-nm SRAM at Ultralow Bias Voltage
ArticleAbstract: This paper presents the characterization of the sensitivity to 14-MeV neutrons of a commercial off-tPalabras claves:Cots, low-bias voltage, neutron tests, radiation hardness, reliability, Soft error, static random access memory (SRAM)Autores:Baylac M., Clemente J.A., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Velazco R.Fuentes:scopusSEU Characterization of Three Successive Generations of COTS SRAMs at Ultralow Bias Voltage to 14.2-MeV Neutrons
ArticleAbstract: This paper presents a single event upset (SEU) sensitivity characterization at ultralow bias voltagePalabras claves:Commercial off-the-shelf (COTS), low bias voltage, neutron tests, radiation hardness, reliability, Soft error, static random access memories (SRAM)Autores:Baylac M., Clemente J.A., Fraire J., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Rey S., Velazco R.Fuentes:scopusStatistical Anomalies of Bitflips in SRAMs to Discriminate SBUs from MCUs
ArticleAbstract: Recently, the occurrence of multiple events in static tests has been investigated by checking the stPalabras claves:Multiple cell upsets, neutron tests, Single Event Upsets, SRAMsAutores:Agapito J.A., Baylac M., Clemente J.A., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Rey S., Velazco R.Fuentes:scopusStatistical Deviations from the Theoretical Only-SBU Model to Estimate MCU Rates in SRAMs
ArticleAbstract: This paper addresses a well-known problem that occurs when memories are exposed to radiation: the dePalabras claves:Multiple cell upsets (MCUs), single bit upsets (SBUs), single events, soft errors, static random access memories (SRAMs)Autores:Agapito J.A., Baylac M., Clemente J.A., Francesca Villa, Franco F.J., Hubert G., Mecha H., Puchner H., Rey S., Velazco R.Fuentes:scopus