Device-to-system level simulation framework for STT-DMTJ based cache memory

Abstract:

This paper presents a comparative study on non-volatile cache memories based on nanoscaled spin-transfer torque (STT)-magnetic tunnel junctions (MTJs). In particular, the impact of using double-barrier MTJs (DMTJs) instead of conventional single-barrier MTJs (SMTJs) is evaluated through a device-to-system level simulation framework. Simulation results demonstrate that DMTJ-based STT-MRAMs are promising competitors for the next generation of non-volatile cache memories.

Año de publicación:

2019

Keywords:

• Device-to-system simulation framework
• Double-barrier magnetic tunnel junction
• STT-MRAM

Fuente:

scopus