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Live Demo: Silicon evaluation of multimode dual mode logic for PVT-aware datapaths

Abstract:

This demo demonstrates the unique capabilities of the multimode Dual Mode Logic (DML) design technique to define run-time adaptive datapaths to overcome process and environmental (i.e., temperature and voltage) variations. A proof-of concept benchmark circuit is designed and fabricated in 65 nm technology. Measurements on 10 test chips, while considering supply voltages spanning 0.6V to 1.2V and temperature variations ranging from − 40 ° C to 125 ° C confirmed the effectiveness of the proposed approach to compensate even for severe process, voltage and temperature (PVT) variations.

Año de publicación:

2021

Keywords:

    Fuente:

    scopusscopus

    Tipo de documento:

    Conference Object

    Estado:

    Acceso restringido

    Áreas de conocimiento:

    • Ingeniería electrónica
    • Fotovoltaica

    Áreas temáticas:

    • Ciencias de la computación
    • Física aplicada
    • Programación informática, programas, datos, seguridad

    Contribuidores:

    Shavit N.Shavit N.
    Fish A.Fish A.
    Marco LanuzzaMarco Lanuzza
    Ramiro TacoRamiro Taco
    Stanger I.Stanger I.