TFET and FinFET Hybrid Technologies for SRAM Cell: Performance Improvement over a Large VDD-Range


Abstract:

This work proposes and compares Static Random-Access Memory (SRAM) cells using hybrid technology for enabling a large range of voltage operation. Tunnel FET (TFET), FinFET, and conventional MOSFET (CMOS) technologies are considered to build different hybrid SRAM cells: TFET/CMOS, FinFET /CMOS and FinFET/TFET. In all cases, only CMOS and FinFET are used as cross-coupled inverters. For our study, four SRAM topologies (6T, 8T, 9T, 10T) were considered and the simulation was carried out for voltage range from 0.4V to 0.8V. The determination of the Writing and Reading Margin, the Delay and the Power Consumption of each device, enable us to determine that the best trade-off for hybrid is the FinFET/TFET SRAM.

Año de publicación:

2019

Keywords:

  • CMOS
  • FinFET
  • Write Noise Margin
  • Static Noise Margin
  • SRAM
  • TFET
  • DELAY
  • Power consumption
  • hybrid

Fuente:

googlegoogle
scopusscopus

Tipo de documento:

Conference Object

Estado:

Acceso restringido

Áreas de conocimiento:

  • Arquitectura de computadoras
  • Ingeniería electrónica

Áreas temáticas de Dewey:

  • Ciencias de la computación