Mostrando 9 resultados de: 9
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ACM Transactions on Reconfigurable Technology and Systems(1)
IEEE International Symposium on Industrial Electronics(1)
IET Circuits, Devices and Systems(1)
ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems(1)
International Journal of Circuit Theory and Applications(1)
Área de conocimiento
Ciencias de la computación(3)
Ingeniería electrónica(3)
Arquitectura de computadoras(2)
Simulación por computadora(2)
Ciencia de materiales(1)
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scopus(9)
Comparative analysis of yield optimized pulsed flip-flops
ArticleAbstract: In this paper, the influence of random process variations on pulsed flip-flops is analyzed. Monte CaPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Rose R.D.Fuentes:scopusAn efficient and low-cost design methodology to improve SRAM-Based FPGA robustness in space and avionics applications
Conference ObjectAbstract: This paper presents an efficient approach to protect an FPGA design against Single Event Upsets (SEUPalabras claves:Avionics, Fpga, Reconfigurable System, Single Event Upsets, spaceAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusA new low-power high-speed single-clock-cycle binary comparator
Conference ObjectAbstract: This paper presents a new ultra-low power high-speed single-clock-cycle binary comparator. It is basPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusA self-hosting configuration management system to mitigate the impact of radiation-induced multi-bit upsets in SRAM-Based FPGAs
Conference ObjectAbstract: This paper presents an efficient circuit to mitigate the impact of Radiation-Induced Multi-Bit UpsetPalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusDesign and evaluation of high-speed energy-aware carry skip adders
Conference ObjectAbstract: In this paper, the impact of different dynamic logic design styles is evaluated considering as benchPalabras claves:Autores:Frustaci F., Marco Lanuzza, Rose R.D.Fuentes:scopusDesign of energy aware adder circuits considering random intra-die process variations
ArticleAbstract: Energy consumption is one of the main barriers to current high-performance designs. Moreover, the inPalabras claves:Adder design, Intra-die process variations, Yield-driven designAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusExploiting self-reconfiguration capability to improve SRAM-based FPGA robustness in space and avionics applications
ArticleAbstract: This article presents a novel configuration scrubbing core, used for internal detection and correctiPalabras claves:reconfigurable computing, Space and avionics applications, Xilinx FPGAsAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopusEnergy-efficient single-clock-cycle binary comparator
ArticleAbstract: A new fast low-power single-clock-cycle binary comparator is presented. High speed is assured by usiPalabras claves:arithmetic circuits, binary comparator, CMOS, Low-powerAutores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S.Fuentes:scopusLow-power split-path data-driven dynamic logic
ArticleAbstract: Data-pre-charged dynamic logic, also known as data-driven dynamic logic (D3L), is very efficient whePalabras claves:Autores:Corsonello P., Frustaci F., Marco Lanuzza, Perri S., Zicari P.Fuentes:scopus