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2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019(1)
2019 IEEE 10th Latin American Symposium on Circuits and Systems, LASCAS 2019 - Proceedings(1)
Microelectronic Engineering(1)
Proceedings of International Conference on ASIC(1)
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings(1)
Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework
ArticleAbstract: This paper deals with the technology scalability of spin-transfer torque magnetic RAMs (STT-MRAMs)baPalabras claves:Device-to-memory analysis, FinFET, Magnetic tunnel junction (MTJ), STT-MRAM, technology scalingAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusDevice-to-system level simulation framework for STT-DMTJ based cache memory
Conference ObjectAbstract: This paper presents a comparative study on non-volatile cache memories based on nanoscaled spin-tranPalabras claves:Device-to-system simulation framework, Double-barrier magnetic tunnel junction, STT-MRAMAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D.Fuentes:scopusExploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs
Conference ObjectAbstract: This paper explores performance and technology-scalability of STT-MRAMs exploiting double-barrier MTPalabras claves:double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAM, technology-voltage scalingAutores:Carpentieri M., Crupi F., Esteban Garzón, Finocchio G., Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusEvaluating the energy efficiency of stt-mrams based on perpendicular mtjs with double reference layers
Conference ObjectAbstract: This paper evaluates the energy efficiency of STT-MRAMs based on double-barrier MTJs (DMTJs) as compPalabras claves:Autores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D.Fuentes:scopusMicroprocessor Design with a Direct Bluetooth Connection in 45 nm Technology Using Microwind
Conference ObjectAbstract: This paper presents the full-custom design of a 45 nm microprocessor using the electronic design autPalabras claves:45nm, Arithmetic Logic Unit (ALU), Bluetooth (BT), MEMORY, Microprocessor, Microwind, PVT, Radio frequency (RF)Autores:Carlos Macias, Diego Jaramillo, Eliana Acurio, Esteban Garzón, Felix Chavez, Luis Miguel Prócel Moya, Sánchez Luis, Sicard E., Sofia Lara, Trojman L.Fuentes:googlescopus