Mostrando 10 resultados de: 37
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Advances in Intelligent Systems and Computing(13)
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Characterizing High-Speed Serial Transceivers for a Multi-processor Parallel Architecture
Conference ObjectAbstract: Emulation of large scale neural networks is a growing research field that tries to understand how thPalabras claves:Aurora 8b/10b, Fpga, GTX transceivers, Parallel hardware, ZYNQAutores:Bernardo Vallejo-Mancero, Liliana Topón-Visarrea, Mireya Zapata-RodríguezFuentes:googlescopusCompact associative memory for AER spike decoding in FPGA-based evolvable SNN emulation
Conference ObjectAbstract: A spike decoding scheme for Address Event Representation (AER)-based transmission in Spiking NeuralPalabras claves:AER, Associative memory, Digital neuromorphic systems, Evolvable connections, SNNAutores:Madrenas J., Mireya Zapata-RodríguezFuentes:googlescopusAudio-tactile rendering: A review on technology and methods to convey musical information through the sense of touch
ReviewAbstract: Tactile rendering has been implemented in digital musical instruments (DMIs) to offer the musician hPalabras claves:Haptic music player, human computer interaction, Musical haptic wearables, Musical haptics, Sensory substitution systems, Tactile rendering, Vibrotactile feedback, Vibrotactile music compositionAutores:Byron Remache-Vinueza, Fabián Sarmiento-Ortiz, Mireya Zapata-Rodríguez, Trujillo-León A., Vidal-Verdú F.Fuentes:scopusAutomation of a Universal Testing Machine for Measuring Mechanical Properties in Textile Fibers
Conference ObjectAbstract: The purpose of this paper is to design a control system to perform tensile and compression tests onPalabras claves:Compression test, Tensile test, Textile mechanical properties, Universal testing machineAutores:Bernardo Vallejo-Mancero, Liliana Topón-Visarrea, Mireya Zapata-RodríguezFuentes:googlescopusAxonal Delay Controller for Spiking Neural Networks Based on FPGA
Conference ObjectAbstract: In this paper, the implementation of a programmable Axonal Delay Controller (ADyC) mapped on a hardwPalabras claves:Axonal delay, Fpga, Spiking Neural NetworksAutores:Jorge Rolando Alvarez Tello, Madrenas J., Mireya Zapata-Rodríguez, Miroslava Aracely ZapataFuentes:scopusAn implementation of a spiking neural network using digital spiking silicon neuron model on a SIMD processor
Conference ObjectAbstract: We implement a digital spiking silicon neuron (DSSN) [1] in a single instruction multiple data (SIMDPalabras claves:DSSN, Fpga, SIMD processor, SNNAutores:Hori S., Madrenas J., Mireya Zapata-Rodríguez, Morie T., Tamukoh H.Fuentes:scopus3D Printing for STEAM Education
Conference ObjectAbstract: 3D printing has been considered a disruptive technology and its impact on education with the generatPalabras claves:3D printer, Education, STEAM educationAutores:Hugo Arias-Flores, Jorge Rolando Alvarez Tello, Mireya Zapata-RodríguezFuentes:googlescopusA Virtual Learning Environments as Training Tools: An Experience with NEO LMS in Physics Teaching
Conference ObjectAbstract: This research shows the design and implementation of a Virtual Learning Environment in Physics at thPalabras claves:e-Learning, NEO LMS, VLEAutores:Juan Polo-Mantuano, Mireya Zapata-RodríguezFuentes:scopusAER-SRT: Scalable spike distribution by means of synchronous serial ring topology address event representation
ArticleAbstract: Given the massive number of interconnects in Spiking Neural Networks (SNNs), distributing spikes effPalabras claves:AER (Address Event Representation), Aurora protocol, Multi-chip communication, SNN emulation, Synchronous serial ring, Time slot emulationAutores:Dorta T., Madrenas J., Mireya Zapata-Rodríguez, Sánchez G.Fuentes:googlescopusAcceleration of Evolutionary Grammar Using an MISD Architecture Based on FPGA and Petalinuxs
Conference ObjectAbstract: The evolutionary grammars are part of the optimization methods and searching for solutions based onPalabras claves:Evolutionary grammar, Hardware Acceleration, Linux embedded, PetalinuxAutores:Bernardo Vallejo-Mancero, Mireya Zapata-RodríguezFuentes:googlescopus