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Hardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge
Conference ObjectAbstract: This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). APalabras claves:Edge computing, Hardware-Software Integration, HEENS, Neural Computing, SNAVA, SNN, Spiking Neural NetworksAutores:Bernardo Vallejo-Mancero, Madrenas J., Mata-Hernandez D., Mireya Zapata-Rodríguez, Oltra-Oltra J.A., Sato S.Fuentes:googlescopusEvaluation Methods Review of the Innovation Capacity of Companies Based on Knowledge Management
Conference ObjectAbstract: The knowledge economy and the improvement of efficiency in the dissemination and promotion of the acPalabras claves:innovation, Knowledge-management, Making decisionsAutores:Jenny Martínez-Crespo, Jorge Rolando Alvarez Tello, Mireya Zapata-RodríguezFuentes:scopusEfficient Configuration for a Scalable Spiking Neural Network Platform by means of a Synchronous Address Event Representation bus
Conference ObjectAbstract: Hardware architectures for Spiking Neural Networks (SNNs) emulation exhibit accelerated processing tPalabras claves:AER (Address Event Representation), Configurability, Fpga, multi-chip platform, PSoC, SNN emulationAutores:Janio Lincon Jadán Guerrero, Madrenas J., Mireya Zapata-RodríguezFuentes:googlescopusEfficient FPGA Implementation of Direct Digital Synthesizer and Digital Up-Converter for Broadband Multicarrier Transmitter
Conference ObjectAbstract: The high performance of FPGA devices allows moving traditionally analog stages into the digital worlPalabras claves:Digital Up-Converter (DUC), Direct Digital Synthesis (DDS), DSP, Fpga, Multi-rate systems, Polyphase structuresAutores:Cristhian Castro, Mireya Zapata-RodríguezFuentes:googlescopus3D Printing for STEAM Education
Conference ObjectAbstract: 3D printing has been considered a disruptive technology and its impact on education with the generatPalabras claves:3D printer, Education, STEAM educationAutores:Hugo Patricio Arias Flores, Jorge Rolando Alvarez Tello, Mireya Zapata-RodríguezFuentes:googlescopusA Virtual Learning Environments as Training Tools: An Experience with NEO LMS in Physics Teaching
Conference ObjectAbstract: This research shows the design and implementation of a Virtual Learning Environment in Physics at thPalabras claves:e-Learning, NEO LMS, VLEAutores:Juan Polo-Mantuano, Mireya Zapata-RodríguezFuentes:scopusAER-SRT: Scalable spike distribution by means of synchronous serial ring topology address event representation
ArticleAbstract: Given the massive number of interconnects in Spiking Neural Networks (SNNs), distributing spikes effPalabras claves:AER (Address Event Representation), Aurora protocol, Multi-chip communication, SNN emulation, Synchronous serial ring, Time slot emulationAutores:Dorta T., Madrenas J., Mireya Zapata-Rodríguez, Sánchez G.Fuentes:googlescopusCharacterizing High-Speed Serial Transceivers for a Multi-processor Parallel Architecture
Conference ObjectAbstract: Emulation of large scale neural networks is a growing research field that tries to understand how thPalabras claves:Aurora 8b/10b, Fpga, GTX transceivers, Parallel hardware, ZYNQAutores:Bernardo Vallejo-Mancero, Liliana Topón-Visarrea, Mireya Zapata-RodríguezFuentes:googlescopusCompact associative memory for AER spike decoding in FPGA-based evolvable SNN emulation
Conference ObjectAbstract: A spike decoding scheme for Address Event Representation (AER)-based transmission in Spiking NeuralPalabras claves:AER, Associative memory, Digital neuromorphic systems, Evolvable connections, SNNAutores:Madrenas J., Mireya Zapata-RodríguezFuentes:googlescopusAn implementation of a spiking neural network using digital spiking silicon neuron model on a SIMD processor
Conference ObjectAbstract: We implement a digital spiking silicon neuron (DSSN) [1] in a single instruction multiple data (SIMDPalabras claves:DSSN, Fpga, SIMD processor, SNNAutores:Hori S., Madrenas J., Mireya Zapata-Rodríguez, Morie T., Tamukoh H.Fuentes:scopus