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2022 IEEE 13th Latin American Symposium on Circuits and Systems, LASCAS 2022(2)
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IEEE Transactions on Circuits and Systems II: Express Briefs(1)
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Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework
ArticleAbstract: This paper deals with the technology scalability of spin-transfer torque magnetic RAMs (STT-MRAMs)baPalabras claves:Device-to-memory analysis, FinFET, Magnetic tunnel junction (MTJ), STT-MRAM, technology scalingAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusAssessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework
ArticleAbstract: This paper explores non-volatile cache memories implemented by spin-transfer torque magnetic randomPalabras claves:cache memory, Device-to-system simulation framework, double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAMAutores:Carpentieri M., Crupi F., Esteban Garzón, Finocchio G., Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusAdjusting thermal stability in double-barrier MTJ for energy improvement in cryogenic STT-MRAMs
ArticleAbstract: This paper investigates the impact of thermal stability relaxation in double-barrier magnetic tunnelPalabras claves:77 K, Cryogenic cache, Cryogenic electronics, double-barrier magnetic tunnel junction (DMTJ), STT-MRAM, Thermal stability relaxationAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Teman A., Trojman L.Fuentes:scopusExploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs
Conference ObjectAbstract: This paper explores performance and technology-scalability of STT-MRAMs exploiting double-barrier MTPalabras claves:double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAM, technology-voltage scalingAutores:Carpentieri M., Crupi F., Esteban Garzón, Finocchio G., Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusEnergy-Efficient FinFET-Versus TFET-Based STT-MRAM Bitcells
Conference ObjectAbstract: This paper explores STT-MRAM bitcells based on double-barrier magnetic tunnel junctions (DMTJs) at tPalabras claves:double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAM, tunnel FET (TFET), Ultralow voltageAutores:Ariana Musello, Luis Miguel Prócel Moya, Marco Villegas, Ramiro Taco, Santiago S. Perez, Trojman L.Fuentes:googlescopusEfficiency of Double-Barrier Magnetic Tunnel Junction-Based Digital eNVM Array for Neuro-Inspired Computing
ArticleAbstract: This brief deals with the impact of spin-transfer torque magnetic random access memory (STT-MRAM) cePalabras claves:double-barrier magnetic tunnel junction (DMTJ), energy-efficiency, MNIST dataset, multilayer perceptron (MPL), online classification, STT-MRAMAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Tatiana Moposita, Trojman L., Vladimirescu A.Fuentes:scopusVoltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories
Conference ObjectAbstract: This work presents energy advantages allowed by the technology and voltage scaling of spin-transferPalabras claves:double-barrier magnetic tunnel junction (DMTJ), Embedded memory, energy-efficient, FinFET, Low-voltage, STT-MRAMAutores:Esteban Garzón, Luis Miguel Prócel Moya, Marco Lanuzza, Ramiro Taco, Trojman L.Fuentes:scopusRelaxing non-volatility for energy-efficient DMTJ based cryogenic STT-MRAM
ArticleAbstract: Spin-transfer torque magnetic random-access memory (STT-MRAM) is considered as a premiere candidatePalabras claves:77 K, Cryogenic computing, double-barrier magnetic tunnel junction (DMTJ), STT-MRAM, Thermal stability relaxationAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Teman A., Trojman L.Fuentes:scopus