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10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip, ReCoSoC 2015(1)
2013 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2013(1)
Proceedings -Design, Automation and Test in Europe, DATE(1)
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Towards cognitive reconfigurable hardware: Self-Aware learning in RTR fault-Tolerant SoCs
Conference ObjectAbstract: Traditional embedded systems are evolving into power-And-performance-domain self-Aware intelligent sPalabras claves:Cognitive hardware, Complex adaptive systems, Dynamic fault-Tolerance, Fpga, Machine learning, Partial and run-Time reconfiguration, self-awareness, self-healingAutores:BYRON NAVAS, Ingo Sander, Öberg J.Fuentes:scopusTowards the generic reconfigurable accelerator: Algorithm development, core design, and performance analysis
Conference ObjectAbstract: Adoption of reconfigurable computing is limited in part by the lack of simplified, economic, and reuPalabras claves:Algorithm development, Design methodology, Embedded System, Hardware accelerator, Partial and run-Time reconfiguration, Reconfiguration techniques, System-on-chipAutores:BYRON NAVAS, Ingo Sander, Öberg J.Fuentes:scopusThe RecoBlock SoC platform: A flexible array of reusable run-time-reconfigurable IP-blocks
Conference ObjectAbstract: Run-time reconflgurable (RTR) FPGAs combine the flexibility of software with the high efficiency ofPalabras claves:Adaptivity, Embedded Systems, Partial and run-Time reconfiguration, Reconfigurable architectures, System-on-chipAutores:BYRON NAVAS, Ingo Sander, Öberg J.Fuentes:scopus