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2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019(1)
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IEEE 4th International Forum on Research and Technologies for Society and Industry, RTSI 2018 - Proceedings(1)
IEEE Transactions on Magnetics(1)
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Assessment of STT-MRAM performance at nanoscaled technology nodes using a device-to-memory simulation framework
ArticleAbstract: This paper deals with the technology scalability of spin-transfer torque magnetic RAMs (STT-MRAMs)baPalabras claves:Device-to-memory analysis, FinFET, Magnetic tunnel junction (MTJ), STT-MRAM, technology scalingAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusAssessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework
ArticleAbstract: This paper explores non-volatile cache memories implemented by spin-transfer torque magnetic randomPalabras claves:cache memory, Device-to-system simulation framework, double-barrier magnetic tunnel junction (DMTJ), FinFET, STT-MRAMAutores:Carpentieri M., Crupi F., Esteban Garzón, Finocchio G., Marco Lanuzza, Rose R.D., Trojman L.Fuentes:scopusA comparative study of MWT architectures by means of numerical simulations
Conference ObjectAbstract: In order to improve the efficiency of c-Si and mc-Si solar cells, Metal Wrap Though (MWT) architectuPalabras claves:back contact, MWT, numerical simulation, Photovoltaics, Solar cell, VíaAutores:Crupi F., Fiegna C., Frei M., Magnone P., Marco Lanuzza, Rose R.D., Sangiorgi E., Tonini D.Fuentes:scopusA variation-aware simulation framework for hybrid CMOS/spintronic circuits
Conference ObjectAbstract: In this paper, a variation-aware simulation framework is introduced for hybrid circuits comprising MPalabras claves:device-circuit simulation, magnetic memory, Spintronic circuits, variationsAutores:Alioto M., Carpentieri M., Crupi F., Finocchio G., Marco Lanuzza, Rose R.D., Siracusano G., Tomasello R.Fuentes:scopusDevice-to-system level simulation framework for STT-DMTJ based cache memory
Conference ObjectAbstract: This paper presents a comparative study on non-volatile cache memories based on nanoscaled spin-tranPalabras claves:Device-to-system simulation framework, Double-barrier magnetic tunnel junction, STT-MRAMAutores:Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D.Fuentes:scopusImpact of the Emitter Contact Pattern in c-Si BC-BJ Solar Cells by Numerical Simulations
Conference ObjectAbstract: This paper presents a detailed analysis on the impact of the emitter contact geometry on the performPalabras claves:BC-BJ solar cells, Modeling, PhotovoItaics, Point contact, TCAD simulationAutores:Crupi F., Guerra N., Marco Guevara, Marco Lanuzza, Paul Procel, Rose R.D.Fuentes:googlescopusImpact of voltage scaling on STT-MRAMs through a variability-aware simulation framework
Conference ObjectAbstract: In this paper, we focus on the study of the impact of voltage scaling on writing performance and enePalabras claves:Magnetic tunnel junction (MTJ), Modeling, STT-MRAM, variability, voltage scalingAutores:Carangelo G., Carpentieri M., Crupi F., Finocchio G., Marco Lanuzza, Rose R.D.Fuentes:scopusSimulation Analysis of DMTJ-Based STT-MRAM Operating at Cryogenic Temperatures
ArticleAbstract: This article investigates spin-transfer torque magnetic random access memories (STT-MRAMs) based onPalabras claves:77 K, compact model, Cryogenic computing, double-barrier magnetic tunnel junction (DMTJ), spin-transfer torque magnetic random access memory (STT-MRAM)Autores:Carpentieri M., Crupi F., Esteban Garzón, Marco Lanuzza, Rose R.D., Teman A.Fuentes:scopusVariability-Aware Analysis of Hybrid MTJ/CMOS Circuits by a Micromagnetic-Based Simulation Framework
ArticleAbstract: Magnetic tunnel junctions (MTJs) are attracting an increasing interest due to their potentiality forPalabras claves:hybrid MTJ/CMOS circuits, Magnetic tunnel junction (MTJ), spintronicsAutores:Carpentieri M., Crupi F., Finocchio G., Marco Lanuzza, Rose R.D., Siracusano G., Tomasello R.Fuentes:scopusSTT-MTJ Based Smart Implication for Energy-Efficient Logic-in-Memory Computing
ArticleAbstract: Spin-transfer torque magnetic tunnel junction (STT-MTJ) technology is an attractive solution for desPalabras claves:Compact modeling, Logic-in-Memory, Material implication, SIMPLY, STT-MTJAutores:Crupi F., Marco Lanuzza, Pavan P., Puglisi F.M., Rose R.D., Zanotti T.Fuentes:scopus